On June 10, 2026, TensorWave closed a $350 million Series B at a $1.55 billion valuation. The round was led by AMD Ventures and Magnetar Capital, with continued participation from Maverick Silicon, Nexus Venture Partners, and Western Frontier.
TensorWave runs no NVIDIA hardware. That’s not a footnote — it’s the thesis.
The funding signals something builders should track: a well-capitalized alternative GPU cloud is now a real option, and the software stack that makes AMD GPUs usable for production AI inference has quietly crossed a threshold in 2026.
What TensorWave Is Selling
TensorWave operates AMD Instinct GPU clusters for AI workloads — training, high-throughput inference, generative AI applications. The current fleet is roughly 10,000 AMD GPUs across three data centers, with 14 megawatts of operational capacity. The $350M goes toward scaling that: 500 megawatts of leases are already signed, with a stated target of 2 gigawatts.
The GPU lineup is the practical differentiator:
AMD Instinct MI300X — 192GB HBM3 memory, currently available from TensorWave and Vultr at under $2/hour. For context, H100 on-demand pricing runs from roughly $0.47/hr (spot/shared) to $14.90/hr (reserved, large providers), with typical on-demand sitting around $2.50-4/hr.
AMD Instinct MI355X — 288GB HBM3E memory, 8TB/s memory bandwidth. Being deployed as part of TensorWave’s expansion. The memory ceiling here is significant: models that won’t fit on a single H100 (80GB) without quantization, or even an H200 (141GB), can run inference at full precision on MI355X.
The value proposition for memory-bound workloads is straightforward: you’re getting 2.4x the memory of an H100 at comparable or lower hourly cost.
Why This Matters Now: ROCm Has Matured
The traditional objection to AMD for AI has been software. CUDA’s ecosystem — libraries, tooling, community knowledge — built up over a decade. ROCm has been catching up, and in 2026 it has crossed a threshold that makes it viable for most standard inference workloads.
vLLM official support: The vLLM team now maintains first-party ROCm support. The AMD-specific Docker images (previously maintained separately) have been deprecated in favor of the official vllm/vllm-openai-rocm image. This isn’t a fork — it’s upstream.
SGLang support: SGLang, which has become a preferred serving framework for its continuous batching performance, also has official ROCm support.
AITER optimization: AMD introduced AITER (AI Tensor Engine for ROCm), an attention optimization layer that delivers 1.2-1.6x speedup on decode-heavy inference workloads through shared assembly decode kernels. For Llama-family models, the defaults (ROCM_AITER_FA for multi-head attention, ROCM_AITER_MLA for multi-latent attention) work well out of the box.
Day 0 model support: AMD has been shipping same-day support for major model releases. Qwen 3.5 and Gemma 4 both had Day 0 support on AMD Instinct GPUs in 2026. This is a deliberate ecosystem investment.
Performance benchmark: For standard LLM inference with PyTorch and vLLM, ROCm on MI300X or MI355X reaches 90-95% of H100 throughput on most workloads. Memory-bandwidth-heavy tasks — large model prefill, long-context generation, large batch decoding — are where AMD’s memory advantage actually shows.
Known Limitations
MoE model regression with AITER: There’s a documented regression with AITER on Mixture-of-Experts architectures — specifically Mixtral and DeepSeek-R1. If your workload runs on these models, test specifically before committing.
Custom CUDA kernels don’t port automatically: If your stack relies on hand-tuned CUDA kernels (FlashAttention variants, custom triton kernels with CUDA-specific assumptions), you’ll have porting work. Standard PyTorch/vLLM workloads don’t hit this.
Smaller cloud ecosystem: TensorWave is well-funded but not AWS. If you need integrations with other cloud services in the same VPC, you’re working around the edges. CoreWeave, Lambda, and other NVIDIA-primary clouds have deeper integration surfaces.
Ecosystem familiarity: Most debugging resources, forum answers, and community knowledge assume CUDA. ROCm errors require AMD-specific knowledge. This has a real onboarding cost for teams that have CUDA muscle memory.
The Builder Decision Matrix
Switch to AMD/ROCm if:
- Your model is memory-bound and won’t fit on H100 without quantization
- You’re running long-context inference (128K+ tokens) where HBM3E bandwidth matters
- You’re cost-sensitive and your stack runs standard vLLM/SGLang without custom kernels
- You want to reduce single-vendor concentration risk in your infrastructure
Stay on NVIDIA if:
- You have heavy custom CUDA kernel investments that would require significant porting
- You’re running MoE architectures (Mixtral, DeepSeek-R1) in production — wait for the AITER regression to be resolved
- You need tight integration with NVIDIA’s inference optimization stack (TensorRT-LLM, Triton Inference Server’s CUDA path)
- Your team’s operational knowledge is entirely CUDA-based and switching costs are high
Worth prototyping if:
- You’re at the design phase for a new inference stack and want cost optionality
- You run batched inference jobs (training, eval, synthetic data generation) where throughput per dollar is the key metric
The Infrastructure Signal
AMD Ventures leading a $350M round in an AMD-only cloud is a strategic investment, not just a financial one. TensorWave’s expansion signals AMD’s confidence that the software ecosystem (ROCm, vLLM, SGLang) is mature enough to sustain a serious cloud business.
The builder implication: this isn’t a niche option anymore. TensorWave is building toward 2 gigawatts of AMD GPU capacity. If that build-out happens, builders who’ve already tested and integrated AMD-compatible workflows have optionality that pure NVIDIA shops don’t.
The question to answer in your own infrastructure is narrow: does your current LLM inference stack depend on anything CUDA-specific? If not, the cost and memory argument for AMD is worth a serious prototype.
TensorWave’s Series B announcement: BusinessWire, June 10, 2026
GPU pricing comparison: GetDeploying GPU pricing, 2026
ROCm/vLLM performance detail: vLLM ROCm attention backend blog, Feb 2026
AMD AI DevDay 2026 software stack announcements: AMD Developer blog
TensorWave top takeaways: TensorWave blog, AMD AI DevDay